Saugata Ghose

Assistant Professor

Refereed Conference & Journal Publications

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2024

R. Wong, N. Kim, K. M. Higgs, E. İpek, S. Agarwal, S. Ghose, and B. Feinberg
TCAM-SSD: A Framework for Search-Based Computing in Solid-State Drives
to be presented at the Non-Volatile Memories Workshop (NVMW), San Diego, CA, March 2024
G. F. Oliveira, A. Olgun, A. G. Yağlıkçı, Nisa Bostancı, J. Gómez-Luna, S. Ghose, and O. Mutlu
MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data Computing
to appear in Proc. of the International Symposium on High-Performance Computer Architecture (HPCA), March 2023

2023

G. F. Oliveira, S. Ghose, J. Gómez-Luna, A. Boroumand, A. Savery, S. Rao, S. Qazi, G. Grignou, R. Thakur, E. Shiu, and O. Mutlu
Extending Memory Capacity in Modern Consumer Systems With Emerging Non-Volatile Memory: Experimental Analysis and Characterization Using the Intel Optane SSD
in IEEE Access, September 2023

2022

G. F. Oliveira, J. Gómez-Luna, S. Ghose, A. Boroumand, and O. Mutlu
Accelerating Neural Network Inference With Processing-in-DRAM: From the Edge to the Cloud
in IEEE Micro, November/December 2022
preprint version available on arXiv, September 2022
S. Ghose
The Road to Widely Deploying Processing-in-Memory: Challenges and Opportunities
invited talk in Proc. of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pafos, Cyprus, July 2022
G. F. Oliveira, A. Boroumand, S. Ghose, J. Gómez-Luna, and O. Mutlu
Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databases
invited talk in Proc. of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pafos, Cyprus, July 2022
G. F. Oliveira, J. Gómez-Luna, S. Ghose, and O. Mutlu
Methodologies, Workloads, and Tools for Processing-in-Memory: Enabling the Adoption of Data-Centric Architectures
invited talk in Proc. of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pafos, Cyprus, July 2022
D. Senol Cali, K. Kanellopoulos, J. Lindegger, Z. Bingöl, G. S. Kalsi, Z. Zuo, C. Firtana, M. B. Cavlak, J. S. Kim, N. Mansouri Ghiasi, G. Singh, J. Gómez-Luna, N. A. Alserr, M. Alser, S. Subramoney, C. Alkan, S. Ghose, and O. Mutlu
SeGraM: A Universal Hardware Accelerator for Genomic Sequence-to-Graph and Sequence-to-Sequence Mapping
in Proc. of the International Symposium on Computer Architecture (ISCA), New York, NY, June 2022
M. S. Q. Truong, L. Shen, A. Glass, A. Hoffmann, L. R. Carley, J. A. Bain, and S. Ghose
Adapting the RACER Architecture to Integrate Improved In-ReRAM Logic Primitives
in IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), June 2022
presented at the Non-Volatile Memories Workshop (NVMW), San Diego, CA, March 2023
two-page NVMW summary paper
A. Boroumand, S. Ghose, G. F. Oliveira, and O. Mutlu
Polynesia: Enabling High-Performance and Energy-Efficient Hybrid Transactional/Analytical Databases with Hardware/Software Co-Design
in Proc. of the IEEE International Conference on Data Engineering (ICDE), May 2022

2021

M. S. Q. Truong, E. Chen, D. Su, A. Glass, L. Shen, L. R. Carley, J. A. Bain, and S. Ghose
RACER: Bit-Pipelined Processing Using Resistive Memory
in Proc. of the International Symposium on Microarchitecture (MICRO), October 2021
presented at the Non-Volatile Memories Workshop (NVMW), San Diego, CA, May 2022
two-page NVMW summary paper
finalist for the NVMW Memorable Paper Award
A. Boroumand, S. Ghose, B. Akin, R. Narayanaswami, G. F. Oliveira, X. Ma, E. Shiu, and O. Mutlu
Google Neural Network Models for Edge Devices: Analyzing and Mitigating Machine Learning Inference Bottlenecks
in Proc. of the International Conference on Parallel Architectures and Compilation Techniques (PACT), September 2021
G. F. Oliveira, J. Gómez-Luna, L. Orosa, S. Ghose, N. Vijaykumar, I. Fernandez, M. Sadrosadati, and O. Mutlu
DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement Bottlenecks
in IEEE Access, September 2021
E. Garza, G. Saileshwar, U. Gupta, T. Liu, A. Mahmoud, S. Ghose, and J. Emer
Mentoring Opportunities in Computer Architecture: Analyzing the Past to Develop the Future
in Proc. of the Workshop on Computer Architecture Education (WCAE), co-located with ISCA, June 2021
L. Orosa, Y. Wang, M. Sadrosadati, J. S. Kim, M. Patel, I. Puddu, H. Luo, K. Razavi, J. Gómez-Luna, H. Hassan, N. Mansouri Ghiasi, S. Ghose, and O. Mutlu
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations
in Proc. of the International Symposium on Computer Architecture (ISCA), June 2021
N. Hajinazar, G. F. Oliveira, S. Gregorio, J. D. Ferreira, N. Mansouri Ghiasi, M. Patel, M. Alser, S. Ghose, J. Gómez-Luna, and O. Mutlu
SIMDRAM: An End-to-End Framework for Bit-Serial SIMD Computing in DRAM
in Proc. of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), April 2021
A. G. Yağlıkçı, M. Patel, J. S. Kim, R. Azizi, A. Olgun, L. Orosa, H. Hassan, J. Park, K. Kanellopoulos, T. Shahroodi, S. Ghose, and O. Mutlu
BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows
in Proc. of the International Symposium on High-Performance Computer Architecture (HPCA), March 2021
finalist for the Intel Hardware Security Academic Award

2020

D. Senol Cali, G. S. Kalsi, Z. Bingöl, C. Firtana, L. Subramanian, J. S. Kim, R. Ausavarungnirun, M. Alser, J. Gómez-Luna, A. Boroumand, A. Nori, A. Scibisz, S. Subramoney, C. Alkan, S. Ghose, and O. Mutlu
GenASM: A High-Performance, Low-Power Approximate String Matching Acceleration Framework for Genome Sequence Analysis
in Proc. of the International Symposium on Microarchitecture (MICRO), October 2020
Y. Wang, L. Orosa, X. Peng, Y. Guo, S. Ghose, M. Patel, J. S. Kim, J. Gómez-Luna, M. Sadrosadati, N. Mansouri Ghiasi, and O. Mutlu
FIGARO: Improving System Performance via Fine-Grained In-DRAM Data Relocation and Caching
in Proc. of the International Symposium on Microarchitecture (MICRO), October 2020
M. Alser, Z. Bingöl, D. Senol Cali, J. S. Kim, S. Ghose, C. Alkan, and O. Mutlu
Accelerating Genome Analysis: A Primer on an Ongoing Journey
in IEEE Micro, September/October 2020
presented at the International Conference on Research in Computational Molecular Biology (RECOMB), August/September 2021
preprint version available on arXiv, July 2020
N. Hajinazar, P. Patel, M. Patel, K. Kanellopoulos, S. Ghose, R. Ausavarungnirun, G. F. de Oliveira Jr., J. Appavoo, V. Seshadri, and O. Mutlu
The Virtual Block Interface: A Flexible Alternative to the Conventional Virtual Memory Framework
in Proc. of the International Symposium on Computer Architecture (ISCA), June 2020

2019

S. Ghose, A. Boroumand, J. S. Kim, J. Gómez-Luna, and O. Mutlu
Processing-in-Memory: A Workload-Driven Perspective
in IBM Journal of Research and Development (JRD), Vol. 63, No. 6, November/December 2019
S. Ghose, T. Li, N. Hajinazar, D. Senol Cali, and O. Mutlu
Demystifying Complex Workload–DRAM Interactions: An Experimental Study
in Proc. of the Joint ACM SIGMETRICS/IFIP Performance Conference, Phoenix, AZ, June 2019
in Proceedings of the ACM on Measurement and Analysis of Computing Systems (POMACS), Vol. 3, No. 3, December 2019
A. Boroumand, S. Ghose, M. Patel, H. Hassan, B. Lucia, R. Ausavarungnirun, K. Hsieh, N. Hajinazar, K. T. Malladi, H. Zheng, and O. Mutlu
CoNDA: Efficient Cache Coherence Support for Near-Data Accelerators
in Proc. of the International Symposium on Computer Architecture (ISCA), Phoenix, AZ, June 2019
H. Hassan, M. Patel, J. S. Kim, A. G. Yağlıkçı, N. Vijaykumar, N. Mansouri Ghiasi, S. Ghose, and O. Mutlu
CROW: A Low-Cost Substrate for Improving DRAM Performance, Energy Efficiency, and Reliability
in Proc. of the International Symposium on Computer Architecture (ISCA), Phoenix, AZ, June 2019
O. Mutlu, S. Ghose, J. Gómez-Luna, and R. Ausavarungnirun
Enabling Practical Processing in and Near Memory for Data-Intensive Computing
invited paper in Proc. of the Design Automation Conference (DAC), Las Vegas, NV, June 2019
O. Mutlu, S. Ghose, J. Gómez-Luna, and R. Ausavarungnirun
Processing Data Where It Makes Sense: Enabling In-Memory Computation
invited paper in Microprocessors and Microsystems (MICPRO), Vol. 67, June 2019
preprint version available on arXiv, March 2019
Y. Li, C. R. Lefurgy, K. Rajamani, M. S. Allen-Ware, G. J. Silva, D. D. Heimsoth, S. Ghose, and O. Mutlu
A Scalable Priority-Aware Approach to Managing Data Center Server Power
in Proc. of the International Symposium on High-Performance Computer Architecture (HPCA), Washington, DC, February 2019

2018

Y. Wang, A. Tavakkol, L. Orosa, S. Ghose, N. Mansouri Ghiasi, M. Patel, J. S. Kim, H. Hassan, M. Sadrosadati, and O. Mutlu
Reducing DRAM Latency via Charge-Level-Aware Look-Ahead Partial Restoration
in Proc. of the International Symposium on Microarchitecture (MICRO), Fukuoka, Japan, October 2018
R. Ausavarungnirun, J. Landgraf, V. Miller, S. Ghose. J. Gandhi, C. J. Rossbach, and O. Mutlu
Mosaic: Enabling Application-Transparent Support for Multiple Page Sizes in Throughput Processors
in ACM SIGOPS Operating Systems Review (OSR), Vol. 52, No. 1, July 2018
extended version of MICRO 2017 paper
S. Ghose, A. G. Yağlıkçı, R. Gupta, D. Lee, K. Kudrolli, W. X. Liu, H. Hassan, K. K. Chang, N. Chatterjee, A. Agrawal, M. O'Connor, and O. Mutlu
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study
in Proc. of the ACM SIGMETRICS Conference, Irvine, CA, June 2018
in Proceedings of the ACM on Measurement and Analysis of Computing Systems (POMACS), Vol. 2, No. 3, December 2018
Y. Luo, S. Ghose, Y. Cai, E. F. Haratsch, and O. Mutlu
Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation
in Proc. of the ACM SIGMETRICS Conference, Irvine, CA, June 2018
in Proceedings of the ACM on Measurement and Analysis of Computing Systems (POMACS), Vol. 2, No. 3, December 2018
A. Tavakkol, M. Sadrosadati, S. Ghose, J. Kim, Y. Luo, Y. Wang, N. M. Ghiasi, L. Orosa, J. Gómez-Luna, and O. Mutlu
FLIN: Enabling Fairness and Enhancing Performance in Modern NVMe Solid State Drives
in Proc. of the International Symposium on Computer Architecture (ISCA), Los Angeles, CA, June 2018
D. Senol Cali, J. S. Kim, S. Ghose, C. Alkan, and O. Mutlu
Nanopore Sequencing Technology and Tools for Genome Assembly: Computational Analysis of the Current State, Bottlenecks and Future Directions
in Briefings in Bioinformatics, 2018
preprint version available on arXiv, February 2018
A. Boroumand, S. Ghose, Y. Kim, R. Ausavarungnirun, E. Shiu, R. Thakur, D. Kim, A. Kuusela, A. Knies, P. Ranganathan, and O. Mutlu
Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks
in Proc. of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Williamsburg, VA, March 2018
R. Ausavarungnirun, V. Miller, J. Landgraf, S. Ghose, J. Gandhi, A. Jog, C. J. Rossbach, and O. Mutlu
MASK: Redesigning the GPU Memory Hierarchy to Support Multi-Application Concurrency
in Proc. of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Williamsburg, VA, March 2018
Y. Luo, S. Ghose, Y. Cai, E. F. Haratsch, and O. Mutlu
HeatWatch: Improving 3D NAND Flash Memory Device Reliability by Exploiting Self-Recovery and Temperature Awareness
in Proc. of the International Symposium on High-Performance Computer Architecture (HPCA), Vienna, Austria, February 2018
A. Tavakkol, J. Gómez-Luna, M. Sadrosadati, S. Ghose, and O. Mutlu
MQSim: A Framework for Enabling Realistic Studies of Modern Multi-Queue SSD Devices
in Proc. of the USENIX Conference on File and Storage Technologies (FAST), Oakland, CA, February 2018
J. S. Kim, D. Senol Cali, H. Xin, D. Lee, S. Ghose, M. Alser, H. Hassan, O. Ergin, C. Alkan, and O. Mutlu
GRIM-Filter: Fast Seed Location Filtering in DNA Read Mapping Using Processing-in-Memory Technologies
in Proc. of the Asia Pacific Bioinformatics Conference (APBC), Yokohama, Japan, January 2018
in BMC Genomics, Vol. 19, Suppl. 2, May 2018
preprint version available on arXiv, November 2017

2017

R. Ausavarungnirun, J. Landgraf, V. Miller, S. Ghose. J. Gandhi, C. J. Rossbach, and O. Mutlu
Mosaic: A GPU Memory Manager with Application-Transparent Support for Multiple Page Sizes
in Proc. of the International Symposium on Microarchitecture (MICRO), Cambridge, MA, October 2017
Y. Cai, S. Ghose, E. F. Haratsch, Y. Luo, and O. Mutlu
Error Characterization, Mitigation, and Recovery in Flash Memory Based Solid-State Drives
in Proceedings of the IEEE, Vol. 105, No. 9, September 2017
preprint version available on arXiv, June 2017
Y. Li, S. Ghose, J. Choi, J. Sun, H. Wang, and O. Mutlu
Utility-Based Hybrid Memory Management
in Proc. of the IEEE Cluster Conference (CLUSTER), Honolulu, HI, September 2017
X. Xiang, W. Shi, S. Ghose, L. Peng, O. Mutlu, and N.-F. Tzeng
Carpool: A Bufferless On-Chip Network Supporting Adaptive Multicast and Hotspot Alleviation
in Proc. of the International Conference on Supercomputing (ICS), Chicago, IL, June 2017
K. K. Chang, A. G. Yağlıkçı, S. Ghose, A. Agrawal, N. Chatterjee, A. Kashyap, D. Lee, M. O'Connor, H. Hassan, and O. Mutlu
Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms
in Proc. of the ACM SIGMETRICS Conference, Urbana-Champaign, IL, June 2017
published in Proceedings of the ACM on Measurement and Analysis of Computing Systems (POMACS), Vol. 1, No. 1, June 2017
D. Lee, S. Khan, L. Subramanian, S. Ghose, R. Ausavarungnirun, G. Pekhimenko, V. Seshadri, and O. Mutlu
Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms
in Proc. of the ACM SIGMETRICS Conference, Urbana-Champaign, IL, June 2017
published in Proceedings of the ACM on Measurement and Analysis of Computing Systems (POMACS), Vol. 1, No. 1, June 2017
A. Fukami, S. Ghose, Y. Luo, Y. Cai, and O. Mutlu
Improving the Reliability of Chip-Off Forensic Analysis of NAND Flash Memory Devices
in Proc. of the DFRWS Digital Forensics Research Conference Europe (DFRWS EU), Überlingen, Germany, March 2017
won best paper award at DFRWS EU
published in Digital Investigation, Vol. 20, March 2017
Y. Cai, S. Ghose, Y. Luo, K. Mai, O. Mutlu, and E. F. Haratsch
Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis, Exploits, and Mitigation Techniques
in Proc. of the International Symposium on High-Performance Computer Architecture (HPCA), industrial session, Austin, TX, February 2017
H. Hassan, N. Vijaykumar, S. Khan, S. Ghose, K. Chang, G. Pekhimenko, D. Lee, O. Ergin, and O. Mutlu
SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies
in Proc. of the International Symposium on High-Performance Computer Architecture (HPCA), Austin, TX, February 2017
A. Boroumand, S. Ghose, M. Patel, H. Hassan, B. Lucia, K. Hsieh, K. T. Malladi, H. Zheng, and O. Mutlu
LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory
in IEEE Computer Architecture Letters (CAL), Vol. 16, No. 1, January–June 2017

2016

N. Vijaykumar, K. Hsieh, G. Pekhimenko, S. Khan, A. Shrestha, S. Ghose, A. Jog, P. B. Gibbons, and O. Mutlu
Zorua: A Holistic Approach to Resource Virtualization in GPUs
in Proc. of the International Symposium on Microarchitecture (MICRO), Taipei, Taiwan, October 2016
X. Xiang, S. Ghose, O. Mutlu, and N.-F. Tzeng
A Model for Application Slowdown Estimation in On-Chip Networks and Its Use for Improving System Fairness and Performance
in Proc. of the International Conference on Computer Design (ICCD), Phoenix, AZ, October 2016
K. Hsieh, S. Khan, N. Vijaykumar, K. K. Chang, A. Boroumand, S. Ghose, and O. Mutlu
Accelerating Pointer Chasing in 3D-Stacked Memory: Challenges, Mechanisms, Evaluation
in Proc. of the International Conference on Computer Design (ICCD), Phoenix, AZ, October 2016
Y. Luo, S. Ghose, Y. Cai, E. F. Haratsch, and O. Mutlu
Enabling Accurate and Practical Online Flash Channel Modeling for Modern MLC NAND Flash Memory
in IEEE Journal on Selected Areas in Communications (JSAC), Vol. 34, No. 9, September 2016
K. K. Chang, A. Kashyap, H. Hassan, S. Ghose, K. Hsieh, D. Lee, T. Li, G. Pekhimenko, S. Khan, and O. Mutlu
Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization
in Proc. of the Joint ACM SIGMETRICS/IFIP Performance Conference, Antibes Juan-les-Pins, France, June 2016
Y. Li, D. Wang, S. Ghose, J. Liu, S. Govindan, S. James, E. Peterson, J. Siegler, R. Ausavarungnirun, and O. Mutlu
SizeCap: Coordinating Energy Storage Sizing and Power Capping for Fuel Cell Powered Data Centers
in Proc. of the International Symposium on High-Performance Computer Architecture (HPCA), Barcelona, Spain, March 2016
K. K. Chang, P. J. Nair, D. Lee, S. Ghose, M. Qureshi, and O. Mutlu
Low-Cost Inter-Linked Subarrays (LISA): Enabling Fast Inter-Subarray Data Migration in DRAM
in Proc. of the International Symposium on High-Performance Computer Architecture (HPCA), Barcelona, Spain, March 2016
D. Lee, S. Ghose, G. Pekhimenko, S. Khan, and O. Mutlu
Simultaneous Multi-Layer Access: Improving 3D-Stacked Memory Bandwidth at Low Cost
in ACM Transactions on Architecture and Code Optimization (TACO), Vol. 12, No. 4, January 2016
presented at the HiPEAC Conference, Prague, Czech Republic, January 2016

2015

R. Ausavarungnirun, S. Ghose, O. Kayıran, G. H. Loh, C. R. Das, M. T. Kandemir, and O. Mutlu
Exploiting Inter-Warp Heterogeneity to Improve GPGPU Performance
in Proc. of the International Conference on Parallel Architectures and Compilation Techniques (PACT), San Francisco, CA, October 2015
Y. Cai, Y. Luo, S. Ghose, E. F. Haratsch, K. Mai, and O. Mutlu
Read Disturb Errors in MLC NAND Flash Memory: Characterization, Mitigation, and Recovery
in Proc. of the International Conference on Dependable Systems and Networks (DSN), Rio de Janeiro, Brazil, June 2015
Y. Luo, Y. Cai, S. Ghose, J. Choi, and O. Mutlu
WARM: Improving NAND Flash Memory Lifetime with Write-hotness Aware Refresh Management
in Proc. of the International Conference on Massive Storage Systems and Technology (MSST), Santa Clara, CA, June 2015

2013

S. Ghose, H. Lee, and J. F. Martínez
Improving Memory Scheduling via Processor-Side Load Criticality Information
in Proc. of the International Symposium on Computer Architecture (ISCA), Tel Aviv, Israel, June 2013, pp. 84 - 95

2012

J. Mukundan, S. Ghose, R. Karmazin, E. İpek, and J. F. Martínez
Overcoming Single-Thread Performance Hurdles in the Core Fusion Reconfigurable Multicore Architecture
in Proc. of the International Conference on Supercomputing (ICS), Venice, Italy, June 2012, pp. 101 - 110

2009

S. Ghose, L. Gilgeous, P. Dudnik, A. Aggarwal, and C. Waxman
Architectural Support for Low Overhead Detection of Memory Violations
in Proc. of the Design, Automation and Test in Europe Conference (DATE), Nice, France, April 2009, pp. 652 - 657


Book Chapters

O. Mutlu, S. Ghose, J. Gómez-Luna, and R. Ausavarungnirun
A Modern Primer on Processing in Memory
invited book chapter to appear in Emerging Computing: From Devices to Systems — Looking Beyond Moore and Von Neumann, Springer, 2021
preprint version available on arXiv, December 2020
S. Ghose, K. Hsieh, A. Boroumand, R. Ausavarungnirun, and O. Mutlu
The Processing-in-Memory Paradigm: Mechanisms to Enable Adoption
invited book chapter in Beyond-CMOS Technologies for Next Generation Computer Design, Springer, 2019
preprint version available on arXiv, February 2018
N. Vijaykumar, K. Hsieh, G. Pekhimenko, S. Khan, S. Ghose, A. Shrestha, A. Jog, P. B. Gibbons, and O. Mutlu
Decoupling the Programming Model from Resource Management in Throughput Processors
invited book chapter in Many-Core Computing: Hardware and Software, IET, 2019
preprint version available on arXiv, February 2018
Y. Cai, S. Ghose, E. F. Haratsch, Y. Luo, and O. Mutlu
Reliability Issues in Flash-Memory-Based Solid-State Drives: Experimental Analysis, Mitigation, Recovery
invited book chapter in Inside Solid State Drives (SSDs), 2nd edition, Springer, 2018
preprint version available on arXiv, January 2018
N. Vijaykumar, G. Pekhimenko, A. Jog, S. Ghose, A. Bhowmick, R. Ausavarungnirun, C. Das, M. Kandemir, T. C. Mowry, and O. Mutlu
A Framework for Accelerating Bottlenecks in GPU Execution with Assist Warps
invited book chapter in Advances in GPU Research and Practice, Elsevier, 2016
preprint version available on arXiv, February 2016


Selected Posters

M. S. Q. Truong, E. Chen, L. Shen, D. Su, S. Prasad, L. R. Carley, J. A. Bain, and S. Ghose
RACER: High-Efficiency Processing in RRAM Through Bit-Pipelining
presented at IBM IEEE CAS/EDS AI Compute Symposium (AICS), October 2020
won best poster award at AICS
D. Senol Cali, Z. Bingöl, J. S. Kim, R. Ausavarungnirun, S. Ghose, C. Alkan, and O. Mutlu
Accelerating Approximate Pattern Matching with Processing-in-Memory (PIM) and Single-Instruction Multiple-Data (SIMD) Programming
presented at RECOMB Sattelite Workshop on Massively Parallel Sequencing (RECOMB-Seq), Paris, France, March 2018
won best poster award at RECOMB-Seq
D. Senol, J. S. Kim, S. Ghose, C. Alkan, and O. Mutlu
Nanopore Sequencing Technology and Tools: Computational Analysis of the Current State, Bottlenecks and Future Directions
presented at Pacific Symposium on Biocomputing (PSB), Honolulu, HI, January 2017