Saugata Ghose

About Me

I am an assistant professor in the Siebel School of Computing and Data Science at the University of Illinois Urbana-Champaign, working broadly in the area of computer architecture. I hold affiliate appointments in the Coordinated Science Laboratory and in the Department of Electrical and Computer Engineering at Illinois.

I lead the ARCANA Research Group (), where we explore several aspects of designing data-centric computer architectures and systems. I am particularly interested in processing-in-memory, introducing interactions between different levels of the compute stack that allow the levels to cooperate with each other, and architectures for emerging platforms and application domains.

Prior to joining Illinois, I was a postdoc and then a systems scientist in the Department of Electrical and Computer Engineering at CMU, working in the SAFARI Research Group. Before moving to CMU, I was a graduate student in the M³ Architecture Group, which is part of the Computer Systems Laboratory at Cornell University. At Cornell, I designed efficient, high-performance memory systems for multicore architectures.

Research Interests

• Data-centric computing / processing-in-memory
• Memory and storage systems
• New interfaces between compute stack layers
• Architectures for emerging platforms/domains

Office

4120 Siebel Center for Computer Science
Summer 2026: by appointment
201 N. Goodwin Ave., MC-258, Urbana IL 61801
(217) 333-1893

• OOPSLA 2026:
  Uncovering Hidden Memory Costs for Garbage Collection
• ASPLOS 2026:
  DARTH-PUM: A Hybrid Processing-Using-Memory Architecture
• HPCA 2026:
  The Memory Processing Unit: A Generalized Interface for End-to-End In-Memory Execution
• APSys 2025:
  CPU Autoscaling With a Kernel of Truth
• ISCA 2025:
  ANVIL: An In-Storage Accelerator for Name–Value Data Stores
• EuroSys 2025:
  CRAVE: Analyzing Cross-Resource Interaction to Improve Energy Efficiency in Systems-on-Chip
• HPCA 2024:
  MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data Computing
• ISCA 2022:
  SeGraM: A Universal Hardware Accelerator for Genomic Sequence-to-Graph and Sequence-to-Sequence Mapping
• JETCAS 2022:
  Adapting the RACER Architecture to Integrate Improved In-ReRAM Logic Primitives
• ICDE 2022:
  Polynesia: Enabling High-Performance and Energy-Efficient Hybrid Transactional/Analytical Databases with Hardware/Software Co-Design
• MICRO 2021:
  RACER: Bit-Pipelined Processing Using Resistive Memory
• PACT 2021:
  Google Neural Network Models for Edge Devices: Analyzing and Mitigating Machine Learning Inference Bottlenecks
• HPCA 2021:
  BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows
• ISCA 2020:
  The Virtual Block Interface: A Flexible Alternative to the Conventional Virtual Memory Framework
• ISCA 2019:
  CoNDA: Efficient Cache Coherence Support for Near-Data Accelerators
• SIGMETRICS 2018:
  What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study
• ASPLOS 2018:
  Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks
• Proceedings of the IEEE 2017:
  Error Characterization, Mitigation, and Recovery in Flash Memory Based Solid-State Drives

View All Publications >

Recent Teaching

• CS 433: Computer System Organization

  Fall 2025, Fall 2024, Spring 2024, Fall 2023
• CS 534 ME: Architectures for Mobile and Edge Computing

  Spring 2025, Spring 2024, Spring 2023, Spring 2022 (as CS 598 SG), Spring 2021 (as CS 498 ME)
• CS 233 Honors: Computer Architecture

  Fall 2024, Fall 2022, Fall 2021
• CS 591 CAP / ECE 590 CAP: CAP Seminar

  Spring 2026, Fall 2025, Spring 2025, Fall 2024, Spring 2024, Fall 2023, Spring 2023, Fall 2022, Spring 2022